Makefile strange variable substitution2019 Community Moderator ElectionPlease explain what happens when I run...
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Makefile strange variable substitution
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Makefile strange variable substitution
2019 Community Moderator ElectionPlease explain what happens when I run this Makefileuse bash to pass 2 variables to a MakefileHow can i make use of makefile exported values while running script fileMakefile include env fileOutput to multiple files with MakefileIs there away to tell make to apply a rule to every file that matches a pattern?Folder exclusion formatting issueHow can I refactor this Makefile to not use fake .out outputs?Makefile fails when trying to run a C programCan't access files from within makefile
My Makefile
looks like this:
%.foo: %.bar
cp $< $@
test: *.foo
echo *.foo
I have 2 files in the directory: a.bar
and b.bar
. When I run make test
it outputs:
cp b.bar *.foo
echo *.foo
*.foo
It also creates a file *.foo
in the current directory.
I am actually expecting to see this:
cp a.bar a.foo
cp b.bar b.foo
echo *.foo
a.foo b.foo
And also creating a.foo
and b.foo
. How to achieve that?
make
add a comment |
My Makefile
looks like this:
%.foo: %.bar
cp $< $@
test: *.foo
echo *.foo
I have 2 files in the directory: a.bar
and b.bar
. When I run make test
it outputs:
cp b.bar *.foo
echo *.foo
*.foo
It also creates a file *.foo
in the current directory.
I am actually expecting to see this:
cp a.bar a.foo
cp b.bar b.foo
echo *.foo
a.foo b.foo
And also creating a.foo
and b.foo
. How to achieve that?
make
add a comment |
My Makefile
looks like this:
%.foo: %.bar
cp $< $@
test: *.foo
echo *.foo
I have 2 files in the directory: a.bar
and b.bar
. When I run make test
it outputs:
cp b.bar *.foo
echo *.foo
*.foo
It also creates a file *.foo
in the current directory.
I am actually expecting to see this:
cp a.bar a.foo
cp b.bar b.foo
echo *.foo
a.foo b.foo
And also creating a.foo
and b.foo
. How to achieve that?
make
My Makefile
looks like this:
%.foo: %.bar
cp $< $@
test: *.foo
echo *.foo
I have 2 files in the directory: a.bar
and b.bar
. When I run make test
it outputs:
cp b.bar *.foo
echo *.foo
*.foo
It also creates a file *.foo
in the current directory.
I am actually expecting to see this:
cp a.bar a.foo
cp b.bar b.foo
echo *.foo
a.foo b.foo
And also creating a.foo
and b.foo
. How to achieve that?
make
make
asked 3 hours ago
Martin ŽdilaMartin Ždila
155115
155115
add a comment |
add a comment |
2 Answers
2
active
oldest
votes
In this case you need to handle wildcards explicitly, with the wildcard
function (at least in GNU Make):
%.foo: %.bar
cp $< $@
foos = $(patsubst %.bar,%.foo,$(wildcard *.bar))
test: $(foos)
echo $(foos)
$(wildcard *.bar)
expands to all the files ending in .bar
, the patsubst
call replaces .bar
with .foo
, and all the targets are then processed as you’d expect.
add a comment |
There is no *.foo file to begin with. So what make does is look for how to make *.foo
literaly and the first rule does this. Make expands $<
to the first pre-requisite (*.bar
, which happens to be b.bar
in this case). Make then runs the shell command cp b.bar *.foo
. Since there is no *.foo, shell expands it to cp b.bar *.foo
literally. That's how you get a *.foo
file.
You can verify this by running make -d test
.
You can get the effect you want by generating the list of targets based on list of prerequisites.
TARGETS = $(patsubst %.bar,%.foo,$(wildcard *.bar))
%.foo: %.bar
@cp $< $@
test: $(TARGETS)
@echo $(TARGETS)
echo *.foo
add a comment |
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2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
oldest
votes
active
oldest
votes
In this case you need to handle wildcards explicitly, with the wildcard
function (at least in GNU Make):
%.foo: %.bar
cp $< $@
foos = $(patsubst %.bar,%.foo,$(wildcard *.bar))
test: $(foos)
echo $(foos)
$(wildcard *.bar)
expands to all the files ending in .bar
, the patsubst
call replaces .bar
with .foo
, and all the targets are then processed as you’d expect.
add a comment |
In this case you need to handle wildcards explicitly, with the wildcard
function (at least in GNU Make):
%.foo: %.bar
cp $< $@
foos = $(patsubst %.bar,%.foo,$(wildcard *.bar))
test: $(foos)
echo $(foos)
$(wildcard *.bar)
expands to all the files ending in .bar
, the patsubst
call replaces .bar
with .foo
, and all the targets are then processed as you’d expect.
add a comment |
In this case you need to handle wildcards explicitly, with the wildcard
function (at least in GNU Make):
%.foo: %.bar
cp $< $@
foos = $(patsubst %.bar,%.foo,$(wildcard *.bar))
test: $(foos)
echo $(foos)
$(wildcard *.bar)
expands to all the files ending in .bar
, the patsubst
call replaces .bar
with .foo
, and all the targets are then processed as you’d expect.
In this case you need to handle wildcards explicitly, with the wildcard
function (at least in GNU Make):
%.foo: %.bar
cp $< $@
foos = $(patsubst %.bar,%.foo,$(wildcard *.bar))
test: $(foos)
echo $(foos)
$(wildcard *.bar)
expands to all the files ending in .bar
, the patsubst
call replaces .bar
with .foo
, and all the targets are then processed as you’d expect.
answered 3 hours ago
Stephen KittStephen Kitt
175k24400478
175k24400478
add a comment |
add a comment |
There is no *.foo file to begin with. So what make does is look for how to make *.foo
literaly and the first rule does this. Make expands $<
to the first pre-requisite (*.bar
, which happens to be b.bar
in this case). Make then runs the shell command cp b.bar *.foo
. Since there is no *.foo, shell expands it to cp b.bar *.foo
literally. That's how you get a *.foo
file.
You can verify this by running make -d test
.
You can get the effect you want by generating the list of targets based on list of prerequisites.
TARGETS = $(patsubst %.bar,%.foo,$(wildcard *.bar))
%.foo: %.bar
@cp $< $@
test: $(TARGETS)
@echo $(TARGETS)
echo *.foo
add a comment |
There is no *.foo file to begin with. So what make does is look for how to make *.foo
literaly and the first rule does this. Make expands $<
to the first pre-requisite (*.bar
, which happens to be b.bar
in this case). Make then runs the shell command cp b.bar *.foo
. Since there is no *.foo, shell expands it to cp b.bar *.foo
literally. That's how you get a *.foo
file.
You can verify this by running make -d test
.
You can get the effect you want by generating the list of targets based on list of prerequisites.
TARGETS = $(patsubst %.bar,%.foo,$(wildcard *.bar))
%.foo: %.bar
@cp $< $@
test: $(TARGETS)
@echo $(TARGETS)
echo *.foo
add a comment |
There is no *.foo file to begin with. So what make does is look for how to make *.foo
literaly and the first rule does this. Make expands $<
to the first pre-requisite (*.bar
, which happens to be b.bar
in this case). Make then runs the shell command cp b.bar *.foo
. Since there is no *.foo, shell expands it to cp b.bar *.foo
literally. That's how you get a *.foo
file.
You can verify this by running make -d test
.
You can get the effect you want by generating the list of targets based on list of prerequisites.
TARGETS = $(patsubst %.bar,%.foo,$(wildcard *.bar))
%.foo: %.bar
@cp $< $@
test: $(TARGETS)
@echo $(TARGETS)
echo *.foo
There is no *.foo file to begin with. So what make does is look for how to make *.foo
literaly and the first rule does this. Make expands $<
to the first pre-requisite (*.bar
, which happens to be b.bar
in this case). Make then runs the shell command cp b.bar *.foo
. Since there is no *.foo, shell expands it to cp b.bar *.foo
literally. That's how you get a *.foo
file.
You can verify this by running make -d test
.
You can get the effect you want by generating the list of targets based on list of prerequisites.
TARGETS = $(patsubst %.bar,%.foo,$(wildcard *.bar))
%.foo: %.bar
@cp $< $@
test: $(TARGETS)
@echo $(TARGETS)
echo *.foo
answered 3 hours ago
Satya MishraSatya Mishra
35615
35615
add a comment |
add a comment |
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