LM22678 Unstable outputDifference between regulator's tab and pin?Capacitor selection with multiple...
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LM22678 Unstable output
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$begingroup$
I am building a voltage regulator with the LM22678-5.
I used TI WE-Bench designer to get the component values needed for the regulator:
The regulator outputs 5V when there is no load however it drops to around 2-3V when a load is connected. Ceramic Capacitors were used for Cin, Cinx and Cbst. Cout is an electrolytic capacitor (35SVPF120M). Below is the PCB layout I used.
Note: Although the PCB has the enable pin tied to VIn I just don't connect that pin to the IC and leave it floating as per the datasheet.
This is the output on my DSO:
Does anyone know what I am doing wrong?
voltage voltage-regulator switch-mode-power-supply buck
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
$endgroup$
add a comment |
$begingroup$
I am building a voltage regulator with the LM22678-5.
I used TI WE-Bench designer to get the component values needed for the regulator:
The regulator outputs 5V when there is no load however it drops to around 2-3V when a load is connected. Ceramic Capacitors were used for Cin, Cinx and Cbst. Cout is an electrolytic capacitor (35SVPF120M). Below is the PCB layout I used.
Note: Although the PCB has the enable pin tied to VIn I just don't connect that pin to the IC and leave it floating as per the datasheet.
This is the output on my DSO:
Does anyone know what I am doing wrong?
voltage voltage-regulator switch-mode-power-supply buck
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
$endgroup$
$begingroup$
What is your input voltage doing while the output is doing the fandango?
$endgroup$
– TimWescott
20 hours ago
$begingroup$
The input voltage does the fandango too
$endgroup$
– jos
19 hours ago
$begingroup$
serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
$endgroup$
– TimWescott
18 hours ago
add a comment |
$begingroup$
I am building a voltage regulator with the LM22678-5.
I used TI WE-Bench designer to get the component values needed for the regulator:
The regulator outputs 5V when there is no load however it drops to around 2-3V when a load is connected. Ceramic Capacitors were used for Cin, Cinx and Cbst. Cout is an electrolytic capacitor (35SVPF120M). Below is the PCB layout I used.
Note: Although the PCB has the enable pin tied to VIn I just don't connect that pin to the IC and leave it floating as per the datasheet.
This is the output on my DSO:
Does anyone know what I am doing wrong?
voltage voltage-regulator switch-mode-power-supply buck
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
$endgroup$
I am building a voltage regulator with the LM22678-5.
I used TI WE-Bench designer to get the component values needed for the regulator:
The regulator outputs 5V when there is no load however it drops to around 2-3V when a load is connected. Ceramic Capacitors were used for Cin, Cinx and Cbst. Cout is an electrolytic capacitor (35SVPF120M). Below is the PCB layout I used.
Note: Although the PCB has the enable pin tied to VIn I just don't connect that pin to the IC and leave it floating as per the datasheet.
This is the output on my DSO:
Does anyone know what I am doing wrong?
voltage voltage-regulator switch-mode-power-supply buck
voltage voltage-regulator switch-mode-power-supply buck
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 20 hours ago
josjos
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
asked 20 hours ago
josjos
161
asked 20 hours ago
josjos
161
161
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
New contributor
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
jos is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.
$begingroup$
What is your input voltage doing while the output is doing the fandango?
$endgroup$
– TimWescott
20 hours ago
$begingroup$
The input voltage does the fandango too
$endgroup$
– jos
19 hours ago
$begingroup$
serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
$endgroup$
– TimWescott
18 hours ago
add a comment |
$begingroup$
What is your input voltage doing while the output is doing the fandango?
$endgroup$
– TimWescott
20 hours ago
$begingroup$
The input voltage does the fandango too
$endgroup$
– jos
19 hours ago
$begingroup$
serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
$endgroup$
– TimWescott
18 hours ago
$begingroup$
What is your input voltage doing while the output is doing the fandango?
$endgroup$
– TimWescott
20 hours ago
$begingroup$
What is your input voltage doing while the output is doing the fandango?
$endgroup$
– TimWescott
20 hours ago
$begingroup$
The input voltage does the fandango too
$endgroup$
– jos
19 hours ago
$begingroup$
The input voltage does the fandango too
$endgroup$
– jos
19 hours ago
$begingroup$
serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
$endgroup$
– Sunnyskyguy EE75
19 hours ago
$begingroup$
What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
$endgroup$
– TimWescott
18 hours ago
$begingroup$
What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
$endgroup$
– TimWescott
18 hours ago
add a comment |
2 Answers
2
active
oldest
votes
$begingroup$
"what I am doing wrong"? - it is likely a sum of small deviations from recommendations of manufacturer. You are not following the recommended layout and details of their component suggestions. You are using non-SMD D1 (inductive leads), the output cap looks too small, input caps are recommended to be at least 2 X 6.8 uF ceramic (webbench comes out with 3 x 22 uF caps, you have only one), and you didn't mention anything about your inductor (pads are too small for a proper inductor).
You need to examine carefully the fundamental current-flow diagram presented in the LM22678 datasheet:
As the datasheet says:
Board layout is critical for the proper operation of switching power
supplies The most important layout rule is to keep the ac current
loops as small as possible
Please trace the current loops as they develop on your PCB, you will find that they are far from optimal.
Addition: here is the WB suggested layout:
While the BOM lists DO-201 package for diode, the layout shows SMD (funny, pictured in opposite direction). Also, there is no need for massive ground trace coming around the inductor, the capacitance of this fast switching node must be minimized. You also should try to characterise your design not just for "no-load" and "full-load", but try to load it gradually to see, where it starts barfing.
Best thing is to get their reference design, and copy exactly everything.
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
$endgroup$
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
my target current is 5A
$endgroup$
– jos
19 hours ago
|
show 5 more comments
$begingroup$
While waiting for you to make better measurements to measure spike risetime and 50% pulse width (PW50) and spike resonant freq. ....I suspect your biggest issues are;
a) Wrong L. Shielded Inductor capacitance
This part may have an SRF in the range of the 5th harmonic of 500kHz f_sw and passthru switch spikes from shield shunt capacitance which is in series with output.
Instead, a non-shielded part SRR1208-4R5ML with 30MHz SRF would be better. or next size up 6.5 uH
b) Scope probe measurements
If not done with calibrated 10:1 probe which gives a flatline on ground test pin. then the probe ground loop antenna effect is giving false measurements. But since the design cannot handle a load, we do not know the threshold of load regulation error.
c) test methods
-Measure with 50 Ohm terminated DSO ( AC coupled !!) to ground, for noise-free results then input and output for actual noise with hi-res spurious measurements.
-Measure slow ramped active load ( NPN with triangle wave current) for the cutoff threshold.
-Measure with various step loads ( using NPN active load) to get load regulation error.
-Measure input voltage regulation error ( ensure input supply is adequate)
-Compare with WebBench test results for startup, steady state and BODE plots.
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
$endgroup$
add a comment |
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2 Answers
2
active
oldest
votes
2 Answers
2
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
"what I am doing wrong"? - it is likely a sum of small deviations from recommendations of manufacturer. You are not following the recommended layout and details of their component suggestions. You are using non-SMD D1 (inductive leads), the output cap looks too small, input caps are recommended to be at least 2 X 6.8 uF ceramic (webbench comes out with 3 x 22 uF caps, you have only one), and you didn't mention anything about your inductor (pads are too small for a proper inductor).
You need to examine carefully the fundamental current-flow diagram presented in the LM22678 datasheet:
As the datasheet says:
Board layout is critical for the proper operation of switching power
supplies The most important layout rule is to keep the ac current
loops as small as possible
Please trace the current loops as they develop on your PCB, you will find that they are far from optimal.
Addition: here is the WB suggested layout:
While the BOM lists DO-201 package for diode, the layout shows SMD (funny, pictured in opposite direction). Also, there is no need for massive ground trace coming around the inductor, the capacitance of this fast switching node must be minimized. You also should try to characterise your design not just for "no-load" and "full-load", but try to load it gradually to see, where it starts barfing.
Best thing is to get their reference design, and copy exactly everything.
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
$endgroup$
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
my target current is 5A
$endgroup$
– jos
19 hours ago
|
show 5 more comments
$begingroup$
"what I am doing wrong"? - it is likely a sum of small deviations from recommendations of manufacturer. You are not following the recommended layout and details of their component suggestions. You are using non-SMD D1 (inductive leads), the output cap looks too small, input caps are recommended to be at least 2 X 6.8 uF ceramic (webbench comes out with 3 x 22 uF caps, you have only one), and you didn't mention anything about your inductor (pads are too small for a proper inductor).
You need to examine carefully the fundamental current-flow diagram presented in the LM22678 datasheet:
As the datasheet says:
Board layout is critical for the proper operation of switching power
supplies The most important layout rule is to keep the ac current
loops as small as possible
Please trace the current loops as they develop on your PCB, you will find that they are far from optimal.
Addition: here is the WB suggested layout:
While the BOM lists DO-201 package for diode, the layout shows SMD (funny, pictured in opposite direction). Also, there is no need for massive ground trace coming around the inductor, the capacitance of this fast switching node must be minimized. You also should try to characterise your design not just for "no-load" and "full-load", but try to load it gradually to see, where it starts barfing.
Best thing is to get their reference design, and copy exactly everything.
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
$endgroup$
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
my target current is 5A
$endgroup$
– jos
19 hours ago
|
show 5 more comments
$begingroup$
"what I am doing wrong"? - it is likely a sum of small deviations from recommendations of manufacturer. You are not following the recommended layout and details of their component suggestions. You are using non-SMD D1 (inductive leads), the output cap looks too small, input caps are recommended to be at least 2 X 6.8 uF ceramic (webbench comes out with 3 x 22 uF caps, you have only one), and you didn't mention anything about your inductor (pads are too small for a proper inductor).
You need to examine carefully the fundamental current-flow diagram presented in the LM22678 datasheet:
As the datasheet says:
Board layout is critical for the proper operation of switching power
supplies The most important layout rule is to keep the ac current
loops as small as possible
Please trace the current loops as they develop on your PCB, you will find that they are far from optimal.
Addition: here is the WB suggested layout:
While the BOM lists DO-201 package for diode, the layout shows SMD (funny, pictured in opposite direction). Also, there is no need for massive ground trace coming around the inductor, the capacitance of this fast switching node must be minimized. You also should try to characterise your design not just for "no-load" and "full-load", but try to load it gradually to see, where it starts barfing.
Best thing is to get their reference design, and copy exactly everything.
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
$endgroup$
"what I am doing wrong"? - it is likely a sum of small deviations from recommendations of manufacturer. You are not following the recommended layout and details of their component suggestions. You are using non-SMD D1 (inductive leads), the output cap looks too small, input caps are recommended to be at least 2 X 6.8 uF ceramic (webbench comes out with 3 x 22 uF caps, you have only one), and you didn't mention anything about your inductor (pads are too small for a proper inductor).
You need to examine carefully the fundamental current-flow diagram presented in the LM22678 datasheet:
As the datasheet says:
Board layout is critical for the proper operation of switching power
supplies The most important layout rule is to keep the ac current
loops as small as possible
Please trace the current loops as they develop on your PCB, you will find that they are far from optimal.
Addition: here is the WB suggested layout:
While the BOM lists DO-201 package for diode, the layout shows SMD (funny, pictured in opposite direction). Also, there is no need for massive ground trace coming around the inductor, the capacitance of this fast switching node must be minimized. You also should try to characterise your design not just for "no-load" and "full-load", but try to load it gradually to see, where it starts barfing.
Best thing is to get their reference design, and copy exactly everything.
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
edited 18 hours ago
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
answered 19 hours ago
Ale..chenskiAle..chenski
27.9k11865
27.9k11865
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
my target current is 5A
$endgroup$
– jos
19 hours ago
|
show 5 more comments
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
my target current is 5A
$endgroup$
– jos
19 hours ago
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
The inductor is the Vishay IHLP4040DZER4R7M01. Can you explain what is wrong with this inductor?
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
Also webench does not tell me 3x22uF it lists the quantity as 1. And the Through hole diode is the SB10150 which was the part shown on webench
$endgroup$
– jos
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, the inductor might be OK, but the diode (1.05V) doesn't look like a good Schottky. As I said, a sum of details...
$endgroup$
– Ale..chenski
19 hours ago
$begingroup$
@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
$endgroup$
– Ale..chenski
19 hours ago
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@jos, my WB shows "Qty.3" on schematics. And diode is B340A. What is your target current?
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– Ale..chenski
19 hours ago
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my target current is 5A
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– jos
19 hours ago
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my target current is 5A
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– jos
19 hours ago
|
show 5 more comments
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While waiting for you to make better measurements to measure spike risetime and 50% pulse width (PW50) and spike resonant freq. ....I suspect your biggest issues are;
a) Wrong L. Shielded Inductor capacitance
This part may have an SRF in the range of the 5th harmonic of 500kHz f_sw and passthru switch spikes from shield shunt capacitance which is in series with output.
Instead, a non-shielded part SRR1208-4R5ML with 30MHz SRF would be better. or next size up 6.5 uH
b) Scope probe measurements
If not done with calibrated 10:1 probe which gives a flatline on ground test pin. then the probe ground loop antenna effect is giving false measurements. But since the design cannot handle a load, we do not know the threshold of load regulation error.
c) test methods
-Measure with 50 Ohm terminated DSO ( AC coupled !!) to ground, for noise-free results then input and output for actual noise with hi-res spurious measurements.
-Measure slow ramped active load ( NPN with triangle wave current) for the cutoff threshold.
-Measure with various step loads ( using NPN active load) to get load regulation error.
-Measure input voltage regulation error ( ensure input supply is adequate)
-Compare with WebBench test results for startup, steady state and BODE plots.
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
$endgroup$
add a comment |
$begingroup$
While waiting for you to make better measurements to measure spike risetime and 50% pulse width (PW50) and spike resonant freq. ....I suspect your biggest issues are;
a) Wrong L. Shielded Inductor capacitance
This part may have an SRF in the range of the 5th harmonic of 500kHz f_sw and passthru switch spikes from shield shunt capacitance which is in series with output.
Instead, a non-shielded part SRR1208-4R5ML with 30MHz SRF would be better. or next size up 6.5 uH
b) Scope probe measurements
If not done with calibrated 10:1 probe which gives a flatline on ground test pin. then the probe ground loop antenna effect is giving false measurements. But since the design cannot handle a load, we do not know the threshold of load regulation error.
c) test methods
-Measure with 50 Ohm terminated DSO ( AC coupled !!) to ground, for noise-free results then input and output for actual noise with hi-res spurious measurements.
-Measure slow ramped active load ( NPN with triangle wave current) for the cutoff threshold.
-Measure with various step loads ( using NPN active load) to get load regulation error.
-Measure input voltage regulation error ( ensure input supply is adequate)
-Compare with WebBench test results for startup, steady state and BODE plots.
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
$endgroup$
add a comment |
$begingroup$
While waiting for you to make better measurements to measure spike risetime and 50% pulse width (PW50) and spike resonant freq. ....I suspect your biggest issues are;
a) Wrong L. Shielded Inductor capacitance
This part may have an SRF in the range of the 5th harmonic of 500kHz f_sw and passthru switch spikes from shield shunt capacitance which is in series with output.
Instead, a non-shielded part SRR1208-4R5ML with 30MHz SRF would be better. or next size up 6.5 uH
b) Scope probe measurements
If not done with calibrated 10:1 probe which gives a flatline on ground test pin. then the probe ground loop antenna effect is giving false measurements. But since the design cannot handle a load, we do not know the threshold of load regulation error.
c) test methods
-Measure with 50 Ohm terminated DSO ( AC coupled !!) to ground, for noise-free results then input and output for actual noise with hi-res spurious measurements.
-Measure slow ramped active load ( NPN with triangle wave current) for the cutoff threshold.
-Measure with various step loads ( using NPN active load) to get load regulation error.
-Measure input voltage regulation error ( ensure input supply is adequate)
-Compare with WebBench test results for startup, steady state and BODE plots.
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
$endgroup$
While waiting for you to make better measurements to measure spike risetime and 50% pulse width (PW50) and spike resonant freq. ....I suspect your biggest issues are;
a) Wrong L. Shielded Inductor capacitance
This part may have an SRF in the range of the 5th harmonic of 500kHz f_sw and passthru switch spikes from shield shunt capacitance which is in series with output.
Instead, a non-shielded part SRR1208-4R5ML with 30MHz SRF would be better. or next size up 6.5 uH
b) Scope probe measurements
If not done with calibrated 10:1 probe which gives a flatline on ground test pin. then the probe ground loop antenna effect is giving false measurements. But since the design cannot handle a load, we do not know the threshold of load regulation error.
c) test methods
-Measure with 50 Ohm terminated DSO ( AC coupled !!) to ground, for noise-free results then input and output for actual noise with hi-res spurious measurements.
-Measure slow ramped active load ( NPN with triangle wave current) for the cutoff threshold.
-Measure with various step loads ( using NPN active load) to get load regulation error.
-Measure input voltage regulation error ( ensure input supply is adequate)
-Compare with WebBench test results for startup, steady state and BODE plots.
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
answered 17 hours ago
Sunnyskyguy EE75Sunnyskyguy EE75
67.8k22398
67.8k22398
add a comment |
add a comment |
jos is a new contributor. Be nice, and check out our Code of Conduct.
jos is a new contributor. Be nice, and check out our Code of Conduct.
jos is a new contributor. Be nice, and check out our Code of Conduct.
jos is a new contributor. Be nice, and check out our Code of Conduct.
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$begingroup$
What is your input voltage doing while the output is doing the fandango?
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– TimWescott
20 hours ago
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The input voltage does the fandango too
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– jos
19 hours ago
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serious layout violation with Vfb, measurement probe errors with ground lead... and poor source impedance
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– Sunnyskyguy EE75
19 hours ago
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Try using ac coupled to coax with 50 Ohm terminator on DSO . Your probe noise may be > 10MHz and show dV/dt next time If V=100mV=LdI/dt and dI is 1A and dt is 50ns what is L?.. Changes are good it is just measurement error from probe ground resonance
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– Sunnyskyguy EE75
19 hours ago
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What are you using for an input supply, and how long are the leads? While the switcher itself could be oscillating like mad, if you've got it hanging off of a high-impedance (or inductive) supply that would also impact stability, particularly without any bulk capacitance at the input.
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– TimWescott
18 hours ago